/*
** ###################################################################
**     Processor:           CVM0116
**     Compiler:            IAR ANSI C/C++ Compiler for ARM
**
**     Abstract:
**         Linker file for the IAR ANSI C/C++ Compiler for ARM
**
**     Copyright (c) 2022, Shenzhen CVA Innovation CO.,LTD
**     All rights reserved.
**
**     Shenzhen CVA Innovation CO.,LTD (CVA chip) is supplying this file for use
**     exclusively with CVA's microcontroller products. This file can be freely
**     distributed within development tools that are supporting such microcontroller
**     products.
** 
**     THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED
**     OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
**     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
**     CVA SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
**     OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
**
**     http:                 www.cvachip.com
**
** ###################################################################
*/

/* SRAM_U */
define symbol m_interrupts_start       = 0x20000000;
define symbol m_interrupts_end         = 0x200000BF;

define symbol m_text_start             = 0x200000C0;
define symbol m_text_end               = 0x200020BF;

define symbol m_custom_start           = 0x200020C0;
define symbol m_custom_end             = 0x200024BF;

define symbol m_data_start             = 0x200024C0;
define symbol m_data_end               = 0x200043FF;

/* Sizes */
if (isdefinedsymbol(__stack_size__)) {
  define symbol __size_cstack__        = __stack_size__;
} else {
  define symbol __size_cstack__        = 0x00000200;
}

if (isdefinedsymbol(__heap_size__)) {
  define symbol __size_heap__          = __heap_size__;
} else {
  define symbol __size_heap__          = 0x00000200;
}

define exported symbol __VECTOR_TABLE          = m_interrupts_start;
define exported symbol __VECTOR_RAM            = m_interrupts_start;
define exported symbol __RAM_VECTOR_TABLE_SIZE = 0x0;

define exported symbol __RAM_START             = m_interrupts_start;
define exported symbol __RAM_END               = m_data_end;

define memory mem with size = 4G;
define region TEXT_region   = mem:[from m_interrupts_start to m_interrupts_end]
                            | mem:[from m_text_start to m_text_end];
define region DATA_region   = mem:[from m_data_start to m_data_end-__size_cstack__];
define region CSTACK_region = mem:[from m_data_end-__size_cstack__+1 to m_data_end];


define block CSTACK    with alignment = 8, size = __size_cstack__   { };
define block HEAP      with alignment = 8, size = __size_heap__     { };
define block RW        { readwrite };
define block ZI        { zi };

/* Custom Section Block that can be used to place data at absolute address. */
/* Use __attribute__((section (".customSection"))) to place data here. */
define block customSectionBlock { section .customSection };
define block __CODE_RAM   { section .textrw  };
define block __CODE_ROM   { section .textrw_init };

initialize manually { section .bss };
initialize manually { section .customSection };
initialize manually { section .textrw };
initialize manually { section __DLIB_PERTHREAD };
do not initialize   { section .noinit, section .bss, section __DLIB_PERTHREAD, section .customSection };

place at address mem: m_interrupts_start    { readonly section .intvec };
place in TEXT_region                        { readonly };
place in TEXT_region                        { block __CODE_ROM };
place in DATA_region                        { first block customSectionBlock };
place in DATA_region                        { block RW };
place in DATA_region                        { block __CODE_RAM };
place in DATA_region                        { block ZI };
place in DATA_region                        { last block HEAP };
place in CSTACK_region                      { block CSTACK };