/*
 * Instance header file for ATSAME51N20A
 *
 * Copyright (c) 2022 Microchip Technology Inc. and its subsidiaries.
 *
 * Subject to your compliance with these terms, you may use Microchip software and any derivatives
 * exclusively with Microchip products. It is your responsibility to comply with third party license
 * terms applicable to your use of third party software (including open source software) that may
 * accompany Microchip software.
 *
 * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY,
 * APPLY TO THIS SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND
 * FITNESS FOR A PARTICULAR PURPOSE.
 *
 * IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
 * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF
 * MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
 * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT
 * EXCEED THE AMOUNT OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
 *
 */

/* file generated from device description version 2022-02-14T14:27:15Z */
#ifndef _SAME51_HMATRIX_INSTANCE_
#define _SAME51_HMATRIX_INSTANCE_


/* ========== Instance Parameter definitions for HMATRIX peripheral ========== */
#define HMATRIX_MASTER_NUM                       (8)        
#define HMATRIX_MASTER_CM4_S                     (0)        
#define HMATRIX_MASTER_CMCC                      (1)        
#define HMATRIX_MASTER_PICOP_MEM                 (2)        
#define HMATRIX_MASTER_PICOP_IO                  (3)        
#define HMATRIX_MASTER_DMAC_DTWR                 (4)        
#define HMATRIX_MASTER_DMAC_DTRD                 (5)        
#define HMATRIX_MASTER_ICM                       (6)        
#define HMATRIX_MASTER_DSU                       (7)        
#define HMATRIX_SLAVE_NUM                        (14)       
#define HMATRIX_SLAVE_FLASH                      (0)        
#define HMATRIX_SLAVE_FLASH_ALT                  (1)        
#define HMATRIX_SLAVE_SEEPROM                    (2)        
#define HMATRIX_SLAVE_RAMCM4S                    (3)        
#define HMATRIX_SLAVE_RAMPPPDSU                  (4)        
#define HMATRIX_SLAVE_RAMDMAWR                   (5)        
#define HMATRIX_SLAVE_RAMDMACICM                 (6)        
#define HMATRIX_SLAVE_HPB0                       (7)        
#define HMATRIX_SLAVE_HPB1                       (8)        
#define HMATRIX_SLAVE_HPB2                       (9)        
#define HMATRIX_SLAVE_HPB3                       (10)       
#define HMATRIX_SLAVE_SDHC0                      (12)       
#define HMATRIX_SLAVE_QSPI                       (14)       
#define HMATRIX_SLAVE_BKUPRAM                    (15)       
#define HMATRIX_INSTANCE_ID                      (38)       /* Instance index for HMATRIX */

#endif /* _SAME51_HMATRIX_INSTANCE_ */
