
#include "hwctrl.h"
#include "clock_drv.h"
#include "SEGGER_RTT.h"
#include "appTask.h"
#include "TLE94x1.h"
#include "string.h"
#include "irq_drv.h"
#include "canuser.h"


/*******************************************************************************
 * the defines
 ******************************************************************************/
#define ADC_DEMO_LAST_CHANNLE ADCH_HEAT_C2
#define PDB_BB_SEL                  (0u)   //000b : PDB0 and PDB1 operates independently.
/*******************************************************************************
 * the typedefs
 ******************************************************************************/



/*******************************************************************************
 * the globals
 ******************************************************************************/
uint32_t adcResult[ADCH_NUM];


/*******************************************************************************
 * the const
 ******************************************************************************/
/*! \brief The trgmux in out mappings table for trgmux configure
 */
const TrgMuxDrv_InOutMappingType c_trgmuxInOutMappings[] = {
    {TRGMUXDRV_TRIGSOURCE_SIM_SW_TRIG, TRGMUXDRV_TARGETMODULE_PDB0_TRG_IN, false}, /* Use SIM_SW_TRIG trigger PDB0 */
};
const uint16_t c_numOfTrgmuxInOutMappings = sizeof(c_trgmuxInOutMappings) / sizeof(TrgMuxDrv_InOutMappingType);

/*******************************************************************************
 * the function prototypes
 ******************************************************************************/

static void hw_IO_Init(McuType *obj);
static void ADC_Init(McuType *obj);



static void hw_clock_init(McuType *obj)
{
    /* Setup the clock */
    ClockDrv_ModuleClkConfigType clockConfig;
    uint32_t tTcr       = 0;
    WdgDrv_Disable(&(obj->wdgDrv));

    SEGGER_RTT_printf(0,"-----clock_INIT-----\n");

    /* Enable the clock for all ports */
    clockConfig.gating = true;
    ClockDrv_ConfigureClock(&obj->clockDrv, CLOCKDRV_PORTA, &clockConfig);
    ClockDrv_ConfigureClock(&obj->clockDrv, CLOCKDRV_PORTB, &clockConfig);
    ClockDrv_ConfigureClock(&obj->clockDrv, CLOCKDRV_PORTC, &clockConfig);
    ClockDrv_ConfigureClock(&obj->clockDrv, CLOCKDRV_PORTD, &clockConfig);
    ClockDrv_ConfigureClock(&obj->clockDrv, CLOCKDRV_PORTE, &clockConfig);

    /* Setup the Pll div2 clock */
    clockConfig.gating = true;
    clockConfig.source = CLOCKDRV_PLL;
    clockConfig.div    = 1;
    ClockDrv_ConfigureClock(&obj->clockDrv, CLOCKDRV_PLL_DIV2, &clockConfig);
    

    /* Setup the FIRC2 div2 clock */
    
    clockConfig.gating = true;
    clockConfig.source = CLOCKDRV_SOSC;
    clockConfig.div    = 1;
    ClockDrv_ConfigureClock(&obj->clockDrv, CLOCKDRV_SOSC_DIV2, &clockConfig);
    
    /* Setup the SPI clock */
    clockConfig.gating = true;
    clockConfig.source = CLOCKDRV_PLL_DIV2;
    ClockDrv_ConfigureClock(&obj->clockDrv, CLOCKDRV_SPI2, &clockConfig);

    tTcr = SpiReg_GetTcr((const SpiRegType *)&obj->spiDrv2.reg);
    SpiDrv_SetPrescaler(&tTcr,0x03);

    //adc功能
    /* Enable the clock for PDB0 */
    ClockDrv_ConfigureClock(&obj->clockDrv, CLOCKDRV_PDB0, &clockConfig);

    /* TRGMUX */
    TrgMuxDrv_ConfigType trgmuxConfig;
    trgmuxConfig.numOfInOutMappings = c_numOfTrgmuxInOutMappings;
    trgmuxConfig.inOutMapping       = c_trgmuxInOutMappings;
    TrgMuxDrv_Configure(&obj->trgMuxDrv, &trgmuxConfig);

    /* Enable the clock for ADC */
    clockConfig.gating = true;
    clockConfig.source = CLOCKDRV_PLL;
    clockConfig.div    = 4;
    ClockDrv_ConfigureClock(&obj->clockDrv, CLOCKDRV_ADC0, &clockConfig);


}


static void ADC_Init(McuType *obj)
{
    for (uint8_t i = 0; i < ADCH_NUM; i++)
    {
        adcResult[i] = 0;
    }
    

    /* Configure ADC module */
    AdcDrv_ConfigType adcCfg;
    AdcDrv_GetDefaultConfig(&adcCfg);
    adcCfg.conversionMode   = ADCDRV_CONVERSION_12BIT; /* Selects the ADC resolution to 12-bit conversion */
    adcCfg.avgEnable        = true;                    /* Enable hardware average function */
    adcCfg.avgSamplesSel    = ADCDRV_AVERAGE_32;       /* Select 32 samples average */
    adcCfg.continuousMode   = ADCDRV_ONESHOT;          /* Select one-shot mode */
    adcCfg.chnCfg[ADCH_Power].chnSel = ADCDRV_INCHN_EXT3;
    adcCfg.chnCfg[ADCH_RLY1].chnSel = ADCDRV_INCHN_VBG;
    adcCfg.chnCfg[ADCH_RLY3].chnSel = ADCDRV_INCHN_EXT0;
    adcCfg.chnCfg[ADCH_RLY5].chnSel = ADCDRV_INCHN_EXT1;
    adcCfg.chnCfg[ADCH_HEAT_SENSOR1].chnSel = ADCDRV_INCHN_LDO_VOLT;
    adcCfg.chnCfg[ADCH_HEAT_SENSOR2].chnSel = ADCDRV_INCHN_EXT3;
    adcCfg.chnCfg[ADCH_HEAT_C1].chnSel = ADCDRV_INCHN_EXT3;
    adcCfg.chnCfg[ADCH_HEAT_C2].chnSel = ADCDRV_INCHN_EXT3;

    adcCfg.chnCfg[ADC_DEMO_LAST_CHANNLE].intEnable = true;  /* Last channel enable interrupt */

    adcCfg.trgSrcCfg.trgSrc      = ADCDRV_HW_TRIGGER;
    adcCfg.trgSrcCfg.hwTrgSrc    = ADCDRV_HW_TRGSRC_PDB;
    adcCfg.trgSrcCfg.swPretrgSrc = ADCDRV_SWPRETRG_PRETRIGGER_0;
    adcCfg.trgSrcCfg.pretrgSrc   = ADCDRV_PRETRG_PDB_PRETRIGGER;
    
      /* Enable ADC interrupts */
    IrqDrv_EnableIrq(ADC0_IRQn);
    AdcDrv_Configure(&obj->adc0Drv, &adcCfg);
    AdcDrv_EnableAdc(&obj->adc0Drv);

    /* Configure PDB module */
    uint32_t pdbFreq;
    ClockDrv_GetFreq(&obj->clockDrv, CLOCKDRV_PDB0, &pdbFreq);

    PdbDrv_ConfigType pdbCfg;
    PdbDrv_GetDefaultConfig(&pdbCfg);
    pdbCfg.ldmode               = PDBDRV_LDMOD_LOAD_VAL_IMMEDIATELY; /* The internal registers are loaded with the values from their buffers, immediately after 1 is written to LDOK */
    pdbCfg.trgInSel             = PDBDRV_TRGSEL_TRGGER_IN_0;         /* Use hardware trigger source */
    pdbCfg.cMode                = PDBDRV_CONT_CONTINUOUS;            /* PDB operation in Continuous mode */
    pdbCfg.prescalerFactor      = PDBDRV_PRESCALER_128MULT;          /* Counting uses the peripheral clock divided by MULT (the multiplication factor) */
    pdbCfg.mult                 = PDBDRV_MULT_FACTOR_40;             /* Multiplication factor is 40 */
    pdbCfg.preTrgCfg.mode[0][0] = PDBDRV_PRETRG_DELAY_MODE;          /* The first channel start with other trigger source */
    pdbCfg.preTrgCfg.mode[0][1] = PDBDRV_PRETRG_BB_MODE;             /* PDB channel[0][1-7] & channel[1][0-7] with Back-to-Back operation*/
    pdbCfg.preTrgCfg.mode[0][2] = PDBDRV_PRETRG_BB_MODE;
    pdbCfg.preTrgCfg.mode[0][3] = PDBDRV_PRETRG_BB_MODE;
    pdbCfg.preTrgCfg.mode[0][4] = PDBDRV_PRETRG_BB_MODE;
    pdbCfg.preTrgCfg.mode[0][5] = PDBDRV_PRETRG_BB_MODE;
    pdbCfg.preTrgCfg.mode[0][6] = PDBDRV_PRETRG_BB_MODE;
    pdbCfg.preTrgCfg.mode[0][7] = PDBDRV_PRETRG_BB_MODE;
    pdbCfg.dlyCfg.modCnt        = 1*pdbFreq / 128 / 40;              /* Periodic triggering PDB in 1s*/
    pdbCfg.dlyCfg.dlyCnt[0][0]  = 0;                                 /* first channel don't need delay time*/
    pdbCfg.bbSel                = PDB_BB_SEL;                        /* Internal channel chaining of PDB0 CH0 and CH1.
                                                                      * CH0 and CH1 of PDB0 back-to-back operation with COCO[7:0] and COCO[15:8] of ADC0.
                                                                      */
    PdbDrv_Configure(&obj->pdb0Drv, &pdbCfg);

    PdbDrv_EnablePdb(&obj->pdb0Drv); /* Enable PDB0 */
    TrgMuxDrv_GenSWTrigger(&obj->trgMuxDrv, 100); /* Trigger PDB0 */
}

void hw_init(McuType *obj)
{
    uint32_t                     gCpuClockFrequency       = 0;

    hw_clock_init(obj);

    SEGGER_RTT_printf(0,"-----SPI_INIT-----\n");
    SBC_SPI_INIT();

    FlexCanBoot_Init(obj);

    hw_IO_Init(obj);

    /* Set system tick clock, 1ms event */
    ClockDrv_GetFreq(&obj->clockDrv, CLOCKDRV_CORE, &gCpuClockFrequency);
    SysTick_Config(gCpuClockFrequency / 1000u);
    IrqDrv_EnableIrq(SysTick_IRQn);

    SBC_Init();

    ADC_Init(obj);
}


#define PINSDRV_DIR_OUTPUT 1
#define PINSDRV_DIR_INPUT  0
static void hw_IO_Init(McuType *obj)
{
    //1
    PinsDrv_SetMuxModeSel(&obj->ptd, 1, PINSDRV_MUX_AS_GPIO);
    PortReg_SetPcrDrvStr(obj->ptd.port, 1, 1);
    PortReg_SetPcrSr(obj->ptd.port, 1, 1);
    PinsDrv_SetPinDirection(&obj->ptd, 1, PINSDRV_DIR_OUTPUT);
    //2
    PinsDrv_SetMuxModeSel(&obj->ptd, 0, PINSDRV_MUX_AS_GPIO);
    PortReg_SetPcrDrvStr(obj->ptd.port, 0, 1);
    PortReg_SetPcrSr(obj->ptd.port, 0, 1);
    PinsDrv_SetPinDirection(&obj->ptd, 0, PINSDRV_DIR_OUTPUT);
    //3
    PinsDrv_SetMuxModeSel(&obj->pte, 11, PINSDRV_MUX_AS_GPIO);
    PortReg_SetPcrDrvStr(obj->pte.port, 11, 1);
    PortReg_SetPcrSr(obj->pte.port, 11, 1);
    PinsDrv_SetPinDirection(&obj->pte, 11, PINSDRV_DIR_OUTPUT);
    //4
    PinsDrv_SetMuxModeSel(&obj->pte, 10, PINSDRV_MUX_AS_GPIO);
    PortReg_SetPcrDrvStr(obj->pte.port, 10, 1);
    PortReg_SetPcrSr(obj->pte.port, 10, 1);
    PinsDrv_SetPinDirection(&obj->pte, 10, PINSDRV_DIR_OUTPUT);
    //5
    PinsDrv_SetMuxModeSel(&obj->pte, 5, PINSDRV_MUX_AS_GPIO);
    PortReg_SetPcrDrvStr(obj->pte.port, 5, 1);
    PortReg_SetPcrSr(obj->pte.port, 5, 1);
    PinsDrv_SetPinDirection(&obj->pte, 5, PINSDRV_DIR_OUTPUT);
    //6
    PinsDrv_SetMuxModeSel(&obj->pte, 4, PINSDRV_MUX_AS_GPIO);
    PortReg_SetPcrDrvStr(obj->pte.port, 4, 1);
    PortReg_SetPcrSr(obj->pte.port, 4, 1);
    PinsDrv_SetPinDirection(&obj->pte, 4, PINSDRV_DIR_OUTPUT);
    //7-12电源
    //13
    PinsDrv_SetMuxModeSel(&obj->pte, 3, PINSDRV_MUX_AS_GPIO);
    PortReg_SetPcrDrvStr(obj->pte.port, 3, 1);
    PortReg_SetPcrSr(obj->pte.port, 3, 1);
    PinsDrv_SetPinDirection(&obj->pte, 3, PINSDRV_DIR_OUTPUT);
    //14
    PinsDrv_SetMuxModeSel(&obj->ptd, 16, PINSDRV_MUX_AS_GPIO);
    PortReg_SetPcrDrvStr(obj->ptd.port, 16, 1);
    PortReg_SetPcrSr(obj->ptd.port, 16, 1);
    PinsDrv_SetPinDirection(&obj->ptd, 16, PINSDRV_DIR_OUTPUT);
    //15
    PinsDrv_SetMuxModeSel(&obj->ptd, 15, PINSDRV_MUX_AS_GPIO);
    PortReg_SetPcrDrvStr(obj->ptd.port, 15, 1);
    PortReg_SetPcrSr(obj->ptd.port, 15, 1);
    PinsDrv_SetPinDirection(&obj->ptd, 15, PINSDRV_DIR_OUTPUT);
    //16
    PinsDrv_SetMuxModeSel(&obj->pte, 9, PINSDRV_MUX_AS_GPIO);
    PortReg_SetPcrDrvStr(obj->pte.port, 9, 1);
    PortReg_SetPcrSr(obj->pte.port, 9, 1);
    PinsDrv_SetPinDirection(&obj->pte, 9, PINSDRV_DIR_OUTPUT);
    //17
    PinsDrv_SetMuxModeSel(&obj->pte, 8, PINSDRV_MUX_AS_GPIO);
    PortReg_SetPcrDrvStr(obj->pte.port, 8, 1);
    PortReg_SetPcrSr(obj->pte.port, 8, 1);
    PinsDrv_SetPinDirection(&obj->pte, 8, PINSDRV_DIR_OUTPUT);
    //18
    PinsDrv_SetMuxModeSel(&obj->ptb, 5, PINSDRV_MUX_AS_GPIO);
    PortReg_SetPcrDrvStr(obj->ptb.port, 5, 1);
    PortReg_SetPcrSr(obj->ptb.port, 5, 1);
    PinsDrv_SetPinDirection(&obj->ptb, 5, PINSDRV_DIR_OUTPUT);
    //19
    PinsDrv_SetMuxModeSel(&obj->ptb, 4, PINSDRV_MUX_AS_GPIO);
    PortReg_SetPcrDrvStr(obj->ptb.port, 4, 1);
    PortReg_SetPcrSr(obj->ptb.port, 4, 1);
    PinsDrv_SetPinDirection(&obj->ptb, 4, PINSDRV_DIR_OUTPUT);
    //20-22预留
    //23
    PinsDrv_SetMuxModeSel(&obj->ptd, 6, PINSDRV_MUX_AS_GPIO);
    PortReg_SetPcrDrvStr(obj->ptd.port, 6, 1);
    PortReg_SetPcrSr(obj->ptd.port, 6, 1);
    PinsDrv_SetPinDirection(&obj->ptd, 6, PINSDRV_DIR_OUTPUT);
    //24
    PinsDrv_SetMuxModeSel(&obj->ptd, 5, PINSDRV_MUX_AS_GPIO);
    PortReg_SetPcrDrvStr(obj->ptd.port, 5, 1);
    PortReg_SetPcrSr(obj->ptd.port, 5, 1);
    PinsDrv_SetPinDirection(&obj->ptd, 5, PINSDRV_DIR_OUTPUT);
    //25-26  SPI
    //27
    PinsDrv_SetMuxModeSel(&obj->ptc, 17, PINSDRV_PIN_DISABLED);
    PortReg_SetPcrDrvStr(obj->ptc.port, 17, 1);
    PortReg_SetPcrSr(obj->ptc.port, 17, 1);
    //28
    PinsDrv_SetMuxModeSel(&obj->ptc, 16, PINSDRV_MUX_AS_GPIO);
    PortReg_SetPcrDrvStr(obj->ptc.port, 16, 1);
    PortReg_SetPcrSr(obj->ptc.port, 16, 1);
    PinsDrv_SetPinDirection(&obj->ptc, 16,PINSDRV_DIR_OUTPUT);
    //29 30 SPI
    //31
    PinsDrv_SetMuxModeSel(&obj->ptb, 3, PINSDRV_PIN_DISABLED);
    PortReg_SetPcrDrvStr(obj->ptb.port, 3, 1);
    PortReg_SetPcrSr(obj->ptb.port, 3, 1);
    //32
    PinsDrv_SetMuxModeSel(&obj->ptb, 2, PINSDRV_MUX_AS_GPIO);
    PortReg_SetPcrDrvStr(obj->ptb.port, 2, 1);
    PortReg_SetPcrSr(obj->ptb.port, 2, 1);
    //33 34 CAN
    //35
    PinsDrv_SetMuxModeSel(&obj->ptc, 9, PINSDRV_MUX_AS_GPIO);
    PortReg_SetPcrDrvStr(obj->ptc.port, 9, 1);
    PortReg_SetPcrSr(obj->ptc.port, 9, 1);
    PinsDrv_SetPinDirection(&obj->ptc, 9,PINSDRV_DIR_OUTPUT);
    //36
    PinsDrv_SetMuxModeSel(&obj->ptc, 8, PINSDRV_MUX_AS_GPIO);
    PortReg_SetPcrDrvStr(obj->ptc.port, 8, 1);
    PortReg_SetPcrSr(obj->ptc.port, 8, 1);
    //37
    PinsDrv_SetMuxModeSel(&obj->pta, 7, PINSDRV_PIN_DISABLED);
    PortReg_SetPcrAen(obj->pta.port, 7, 1);
    PortReg_SetPcrSr(obj->pta.port, 7, 1);
    PinsDrv_SetPinDirection(&obj->pta, 7,0);
    PinsDrv_SetPortInputDisable(&obj->pta,0);
    //38
    PinsDrv_SetMuxModeSel(&obj->pta, 6, PINSDRV_MUX_AS_GPIO);
    PortReg_SetPcrDrvStr(obj->pta.port, 6, 1);
    PortReg_SetPcrSr(obj->pta.port, 6, 1);
    //39
    PinsDrv_SetMuxModeSel(&obj->pte, 7, PINSDRV_MUX_AS_GPIO);
    PortReg_SetPcrDrvStr(obj->pte.port, 7, 1);
    PortReg_SetPcrSr(obj->pte.port, 7, 1);
    //40 41 VDD
    //42 NC
    //43
    PinsDrv_SetMuxModeSel(&obj->ptb, 12, PINSDRV_PIN_DISABLED);
    PortReg_SetPcrDrvStr(obj->ptb.port, 12, 1);
    PortReg_SetPcrSr(obj->ptb.port, 12, 1);
    //44
    PinsDrv_SetMuxModeSel(&obj->ptd, 4, PINSDRV_MUX_AS_GPIO);
    PortReg_SetPcrDrvStr(obj->ptd.port, 4, 1);
    PortReg_SetPcrSr(obj->ptd.port, 4, 1);
    //45
    PinsDrv_SetMuxModeSel(&obj->ptd, 3, PINSDRV_MUX_AS_GPIO);
    PortReg_SetPcrDrvStr(obj->ptd.port, 3, 1);
    PortReg_SetPcrSr(obj->ptd.port, 3, 1);
    //46
    PinsDrv_SetMuxModeSel(&obj->ptd, 2, PINSDRV_PIN_DISABLED);
    PortReg_SetPcrDrvStr(obj->ptd.port, 2, 1);
    PortReg_SetPcrSr(obj->ptd.port, 2, 1);
    //47
    PinsDrv_SetMuxModeSel(&obj->pta, 3, PINSDRV_MUX_AS_GPIO);
    PortReg_SetPcrDrvStr(obj->pta.port, 3, 1);
    PortReg_SetPcrSr(obj->pta.port, 3, 1);
    PinsDrv_SetPinDirection(&obj->pta, 3, PINSDRV_DIR_OUTPUT);
    //48
    PinsDrv_SetMuxModeSel(&obj->pta, 2, PINSDRV_MUX_AS_GPIO);
    PortReg_SetPcrDrvStr(obj->pta.port, 2, 1);
    PortReg_SetPcrSr(obj->pta.port, 2, 1);
    PinsDrv_SetPinDirection(&obj->pta, 2, PINSDRV_DIR_OUTPUT);
    //49
    PinsDrv_SetMuxModeSel(&obj->pta, 1, PINSDRV_PIN_DISABLED);
    PortReg_SetPcrDrvStr(obj->pta.port, 1, 1);
    PortReg_SetPcrSr(obj->pta.port, 1, 1);
    //50
    PinsDrv_SetMuxModeSel(&obj->pta, 0, PINSDRV_PIN_DISABLED);
    PortReg_SetPcrDrvStr(obj->pta.port, 0, 1);
    PortReg_SetPcrSr(obj->pta.port, 0, 1);
    //51
    PinsDrv_SetMuxModeSel(&obj->ptc, 7, PINSDRV_PIN_DISABLED);
    PortReg_SetPcrDrvStr(obj->ptc.port, 7, 1);
    PortReg_SetPcrSr(obj->ptc.port, 7, 1);
    //52
    PinsDrv_SetMuxModeSel(&obj->ptc, 6, PINSDRV_MUX_AS_GPIO);
    PortReg_SetPcrDrvStr(obj->ptc.port, 6, 1);
    PortReg_SetPcrSr(obj->ptc.port, 6, 1);
    PinsDrv_SetPinDirection(&obj->ptc, 6, PINSDRV_DIR_OUTPUT);
    //53
    PinsDrv_SetMuxModeSel(&obj->pte, 6, PINSDRV_MUX_AS_GPIO);
    PortReg_SetPcrDrvStr(obj->pte.port, 6, 1);
    PortReg_SetPcrSr(obj->pte.port, 6, 1);
    PinsDrv_SetPinDirection(&obj->pte, 6, PINSDRV_DIR_OUTPUT);
    //54
    PinsDrv_SetMuxModeSel(&obj->pte, 2, PINSDRV_MUX_AS_GPIO);
    PortReg_SetPcrDrvStr(obj->pte.port, 2, 1);
    PortReg_SetPcrSr(obj->pte.port, 2, 1);
    PinsDrv_SetPinDirection(&obj->pte, 2, PINSDRV_DIR_OUTPUT);
    //55
    PinsDrv_SetMuxModeSel(&obj->pta, 13, PINSDRV_MUX_AS_GPIO);
    PortReg_SetPcrDrvStr(obj->pta.port, 13, 1);
    PortReg_SetPcrSr(obj->pta.port, 13, 1);
    PinsDrv_SetPinDirection(&obj->pta, 12, PINSDRV_DIR_OUTPUT);
    //56
    PinsDrv_SetMuxModeSel(&obj->pta, 12, PINSDRV_MUX_AS_GPIO);
    PortReg_SetPcrDrvStr(obj->pta.port, 12, 1);
    PortReg_SetPcrSr(obj->pta.port, 12, 1);
    PinsDrv_SetPinDirection(&obj->pta, 11, PINSDRV_DIR_OUTPUT);
    //57
    PinsDrv_SetMuxModeSel(&obj->pta, 11, PINSDRV_MUX_AS_GPIO);
    PortReg_SetPcrDrvStr(obj->pta.port, 11, 1);
    PortReg_SetPcrSr(obj->pta.port, 11, 1);
    //58
    PinsDrv_SetMuxModeSel(&obj->pta, 10, PINSDRV_MUX_AS_GPIO);
    PortReg_SetPcrDrvStr(obj->pta.port, 10, 1);
    PortReg_SetPcrSr(obj->pta.port, 10, 1);
    PinsDrv_SetPinDirection(&obj->pta, 10, PINSDRV_DIR_OUTPUT);
    //59
    PinsDrv_SetMuxModeSel(&obj->pte, 1, PINSDRV_MUX_AS_GPIO);
    PortReg_SetPcrDrvStr(obj->pte.port, 1, 1);
    PortReg_SetPcrSr(obj->pte.port, 1, 1);
    PinsDrv_SetPinDirection(&obj->pte, 1, PINSDRV_DIR_OUTPUT);
    //60
    PinsDrv_SetMuxModeSel(&obj->pte, 0, PINSDRV_MUX_AS_GPIO);
    PortReg_SetPcrDrvStr(obj->pte.port, 0, 1);
    PortReg_SetPcrSr(obj->pte.port, 0, 1);
    PinsDrv_SetPinDirection(&obj->pte, 0, PINSDRV_DIR_OUTPUT);
    //61
    PinsDrv_SetMuxModeSel(&obj->pte, 5, PINSDRV_MUX_AS_GPIO);
    PortReg_SetPcrDrvStr(obj->pte.port, 5, 1);
    PortReg_SetPcrSr(obj->pte.port, 5, 1);
    //62-64 SWD
}

/*************************************motor driver *****************************************/
void hw_MotorCtrl(McuType *obj,Motor_ID_Type motorid,Motor_ACT_Type dir)
{
    switch(motorid)
    {
        case MotorHG:
            switch(dir)
            {
                case Motor_ACT_NOACT:
                    PinsDrv_ClearPin(&obj->ptd, 0);
                    PinsDrv_ClearPin(&obj->ptd, 1);
                    break;
                case Motor_ACT_CW:
                    PinsDrv_SetPin(&obj->ptd, 0);
                    PinsDrv_ClearPin(&obj->ptd, 1);
                    break;
                case Motor_ACT_CCW:
                    PinsDrv_SetPin(&obj->ptd, 1);
                    PinsDrv_ClearPin(&obj->ptd, 0);
                    break;
            }
            break;
        case MotorKB:
            switch(dir)
            {
                case Motor_ACT_NOACT:
                    PinsDrv_ClearPin(&obj->pte, 10);
                    PinsDrv_ClearPin(&obj->pte, 11);
                    break;
                case Motor_ACT_CW:
                    PinsDrv_SetPin(&obj->pte, 10);
                    PinsDrv_ClearPin(&obj->pte, 11);
                    break;
                case Motor_ACT_CCW:
                    PinsDrv_SetPin(&obj->pte, 11);
                    PinsDrv_ClearPin(&obj->pte, 10);
                    break;
            }
            break;
        case MotorTT:
            switch(dir)
            {
                case Motor_ACT_NOACT:
                    PinsDrv_ClearPin(&obj->pte, 4);
                    PinsDrv_ClearPin(&obj->pte, 5);
                    break;
                case Motor_ACT_CW:
                    PinsDrv_SetPin(&obj->pte, 4);
                    PinsDrv_ClearPin(&obj->pte, 5);
                    break;
                case Motor_ACT_CCW:
                    PinsDrv_SetPin(&obj->pte, 5);
                    PinsDrv_ClearPin(&obj->pte, 4);
                    break;
            }
            break;
        case MotorZY:
            switch(dir)
            {
                case Motor_ACT_NOACT:
                    PinsDrv_ClearPin(&obj->pte, 3);
                    PinsDrv_ClearPin(&obj->ptd, 16);
                    break;
                case Motor_ACT_CW:
                    PinsDrv_SetPin(&obj->pte, 3);
                    PinsDrv_ClearPin(&obj->ptd, 16);
                    break;
                case Motor_ACT_CCW:
                    PinsDrv_SetPin(&obj->ptd, 16);
                    PinsDrv_ClearPin(&obj->pte, 3);
                    break;
            }
            break;
        case Motor5:
            switch(dir)
            {
                case Motor_ACT_NOACT:
                    PinsDrv_ClearPin(&obj->pte, 9);
                    PinsDrv_ClearPin(&obj->ptd, 15);
                    break;
                case Motor_ACT_CW:
                    PinsDrv_SetPin(&obj->pte, 9);
                    PinsDrv_ClearPin(&obj->ptd, 15);
                    break;
                case Motor_ACT_CCW:
                    PinsDrv_SetPin(&obj->ptd, 15);
                    PinsDrv_ClearPin(&obj->pte, 9);
                    break;
            }
            break;
        case Motor6:
            switch(dir)
            {
                case Motor_ACT_NOACT:
                    PinsDrv_ClearPin(&obj->pte, 8);
                    PinsDrv_ClearPin(&obj->ptb, 5);
                    break;
                case Motor_ACT_CW:
                    PinsDrv_SetPin(&obj->pte, 8);
                    PinsDrv_ClearPin(&obj->ptb, 5);
                    break;
                case Motor_ACT_CCW:
                    PinsDrv_SetPin(&obj->pte, 8);
                    PinsDrv_ClearPin(&obj->ptb, 5);
                    break;
            }
            break;  
    }
}









